Chip-to-chip communication is commonly implemented with high-speed, point-to-point links such as with differential point-to-point links transmitting differential data signals. Achievable data rates can be affected by voltage and timing margins of the transmitted signals. For example, deviations from specified transmitted voltage swings during operation can result in decreased margins and therefore a decreased data-rate. Unfortunately, it is difficult to control voltage swing levels because they vary with operating environment changes such as with changes in PVT (process, voltage, and temperature). Because PVT changes generally affect the various transmitter circuits within a chip the same, chips typically incorporate one or more distributed general compensation circuits to control multiple transmitter circuits reasonably proximal to the compensation circuit to compensate for such PVT variations.
FIG. 1 shows a conventional multi-bit point-to-point link with global current compensation (I-Comp) and termination resistance compensation (R-Comp) to control (e.g., keep reasonably constant) drive currents and termination resistances in accordance with design specifications. It comprises N transmitter drivers 101 to be coupled to N corresponding receivers (e.g., on a different chip, not shown). Each driver has an associated pair of variable termination resistors to convey differential data signals (Dini, Dini#). Also included is a global current compensation (I-Comp) circuit 103, which uses a reference current (I-Ref) to generate and distribute multiple copies of current, I1 through IN, to each individual TX driver (Tx1 to TxN). The current is used to generate a desired output swing that is also affected by the values of the termination resistors. A global resistance compensation (R-Comp) circuit 105 is also included to generate resistance compensation signals from an R-Ref control resistor.
Unfortunately, however, within-die systematic and random process variations between the compensation circuits and the transmitter circuits they service, as well as between the transmitter circuit instances themselves, can undue some of the compensation achieved by the general compensation circuits. Thus, using such compensation circuits can still result in errors in the transmitter output voltage swing and thereby decrease the voltage margin available at the receiver decreasing achievable data rates. Accordingly, new solutions are desired.